Technical Field
The present invention relates to freestanding spacers, and more specifically, to methods of forming a freestanding spacer during sidewall image transfer for sub-lithographic structure formation.
Related Art
Photolithography is a technique for transferring an image rendered on one media onto another media photographically. Photolithography techniques are widely used in semiconductor fabrication. Typically, a circuit pattern is rendered as a positive or negative mask image which is then projected onto a silicon substrate coated with photosensitive materials (e.g., PR). Radiation impinges on the masked surface to chemically change those areas of the coating exposed to the radiation, usually by polymerizing the exposed coating. The un-polymerized areas are removed, being more soluble in the developer than the polymerized regions, and the desired image pattern remains.
In the microelectronics industry as well as in other industries involving construction of microscopic structures (e.g., micromachines, magnetoresistive heads, etc.) there is a continued desire to reduce the size of structural features and microelectronic devices and/or to provide a greater amount of circuitry for a given chip size. Miniaturization in general allows for increased performance (more processing per clock cycle and less heat generated) at lower power levels and lower cost. Present technology is at atomic level scaling of certain micro-devices such as logic gates, FETs and capacitors, for example. Circuit chips with hundreds of millions of such devices are common.
In order to achieve further size reductions exceeding the physical limits of trace lines and micro-devices that are embedded upon and within their semiconductor substrates, techniques that exceed lithographic capabilities have been employed. Sidewall image transfer (SIT), also known as self-aligned double patterning (SADP), is one such technique to generate sub-lithographic structures. SIT involves the usage of a sacrificial structure (e.g., a mandrel, typically composed of a polycrystalline silicon), and a sidewall spacer (such as silicon dioxide or silicon nitride, for example) having a thickness less than that permitted by the current lithographic ground rules formed on the sides of the mandrel (e.g., via oxidization or film deposition and etching). After removal of the mandrel, the remaining sidewall spacer is used as a hard mask (HM) to etch the layer(s) below, for example, with a directional reactive ion etch (RIE). Since the sidewall spacer has a sub-lithographic lateral dimension, i.e., width, (less than lithography allows), the structure formed in the layer below will also have a sub-lithographic lateral dimension. In addition, the sidewall spacer at both sides of the sacrificial structure doubles pattern density, resulting in final pitch that is half of the original sacrificial pattern pitch. This reduction in pitch is one major drawback of the SIT process and is known as “pitch walking.” Pitch walking is a phenomenon wherein the final critical dimension and spacer size is smaller than the initial critical dimension and spacer size at the beginning of the SIT process, resulting in two sets of critical dimensions and spacer sizes. For front end of the line (FEOL) SIT processes, the reduction in the sub-lithographic lateral dimension of the sidewall spacer is about 10 nanometers (nm). This reduction is a hurdle for FEOL pitch-scaling to below 50 nm.